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| Several Massively Parallel Chip Vendors Fall by the Wayside |
By Jennifer White & Jeff Bier, 12/17/2008
 In the last few years, there have been a slew of massively parallel chip vendors entering the embedded processor market. The massively parallel approach has become more accepted since Intel commercialized its multi-core PC architecture. It’s still a difficult area in which to build a successful business, however, because it requires not only creating a good architecture, but also developing a sound programming model and competent development tools. Even traditional processor start-ups fail at a prodigious rate, and massively parallel chips have the additional challenge of being perceived as hard to program. So perhaps it’s not surprising that several massively parallel chip vendors have recently fallen by the wayside: Ambric and MathStar, both of which have ceased operations, and Rapport, which is in the process of being acquired for some of its assets and whose processors will probably never be sold as such. Though their endpoints are similar, each of these companies had its own challenges and reasons for failure.
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| ST Offers DSP Software Components for STM32 |
By Jennifer White & Jeff Bier, 12/17/2008
 ST Microelectronics recently announced a new library of digital signal processing software components for its low-cost microcontroller family, the STM32. STM32 chips are based on ARM’s Cortex-M3 core, and they target low-cost embedded applications, particularly motor control. The software component library includes a speech codec and variety of DSP and control-oriented functions, such as FIR and IIR filters, a PID controller, and an FFT. The PID controller is available in both C and assembly, and one of the two IIRs is also written in C; other functions are implemented in assembly only. The speech codec (there is currently only one codec in the library) is based on the Speex open-source format. Library functions can be used with the IAR, Keil and Raisonance tool chains for the STM32.
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| Freescale Ups the Ante with Six-Core Chip |
By Jennifer White & Jeff Bier, 11/19/2008
 Earlier this month Freescale announced that it will be offering a new six-core DSP chip, the MSC8156, that targets wireless infrastructure applications. The chip uses a new DSP processor core, the StarCore SC3850, which is similar to the earlier SC3400 but has (among other enhancements) twice the multiply-accumulate (MAC) throughput – the SC3850 can execute eight 16-bit MACs per cycle rather than four. This is the first new DSP processor product from Freescale in quite a while, and the first such product since Lisa Su took over the reigns of Freescale’s networking and multimedia group from longtime general manager Lynelle McKay. The MSC8156 will be fabbed in a 45 nm process and will be available in two speed grades, 800 MHz and 1 GHz. Freescale expects to sample chips in the first quarter of 2009, with production pricing starting at $192 in 10K quantities.
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| Texas Instruments Introduces Triple-Core ‘C6474 |
By Jennifer White & Jeff Bier, 10/15/2008
 On October 14, 2008, Texas Instruments introduced a high-performance multi-core DSP, the TMS320C6474 that is intended for use in computationally demanding applications such as communications infrastructure, video surveillance, and medical imaging. The chip features three 1 GHz ‘C64x+ cores, each with its own L1 data and program cache, along with 3 MBytes of aggregate (not shared) L2 cache. As shown in Figure 1, the chip also contains a Viterbi accelerator and turbo decoding accelerator along with a DDR interface, an antenna interface, an Ethernet port, and a McBSP serial port. The chip is fabbed in a 65 nm process and costs $225 in 1K quantities. TI is also offering an evaluation module that contains two ‘C6474 chips for $1,995.
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| Percello Puts Cellular Femtocell Baseband on a Chip |
By Jennifer White & Jeff Bier, 10/15/2008
 Fabless semiconductor start-up Percello, is hoping to find success in the UMTS (cellular) femtocell market by offering a highly integrated SoC for baseband processing. Today, femtocell baseband processing is typically handled by a combination of processors and FPGAs, but Percello believes that the potential for high volumes means that a cheaper, simpler solution is needed. The company’s initial product, the PRC6000 baseband chip, is designed to serve as a standalone femtocell processor and as a subsystem element for a residential gateway. The chip will be fabbed in a 65 nm process and tape-out is expected by the end of this year, with initial samples becoming available in the first quarter of 2009. Pricing has not been disclosed, though Percello claims that its chip price will be a key competitive advantage relative to DSP-plus-FPGA or SDR silicon-based solutions.
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| Case Study - Improving Chip Architectures with Specialized Talent |
By Jennifer White & Jeff Bier, 10/15/2008
In an ideal world, chip designers would evaluate their new designs on real applications. But who’s got the time to implement an entire cellular baseband or video codec just to see if their proposed design is efficient? That’s the reason chip designers use benchmarks. But benchmarking is not just about selecting the right algorithms. It’s also about careful implementation—careful crafting of software that is appropriately optimized for the target architecture. As a result, sound benchmarking is a time-consuming activity. That’s why many chip companies come to BDTI; not only for BDTI’s benchmarks, but often to have their own—or their customers’—benchmarks implemented by BDTI’s expert engineering staff.
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| Jeff Bier's Impulse Response—System-in-Package Will Bring Variety, Efficiency |
By Jeff Bier, 10/15/2008
Last month I wrote about how my colleagues and I believe that embedded processor vendors will need to become more involved in developing or acquiring proprietary algorithms to stay competitive in the coming decade. This month, I’ll discuss another long-term trend that we expect to see in processor-based chips: the dramatically expanded use of multi-die packaging (also called “system-in-package”).
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| BDTI Releases Benchmark Results for Tilera’s TILE64 Multicore Processor |
By Jennifer White & Jeff Bier, 9/17/2008
Note: This article has been changed on 09/26/2008 from its original version.
 BDTI has released independent benchmark results for Tilera’s massively parallel TILE64 processor on the BDTI Communications Benchmark (OFDM)™. The TILE64 chip incorporates 64 processor cores connected to each other in a mesh configuration. The cores operate at 866 MHz and are fairly simple, three-issue VLIW machines that support limited SIMD operations, such as SIMD adds and subtracts (but not SIMD multiplies). Tilera expects engineers to program the chip using C/C++ along with intrinsics to access the SIMD capabilities.
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| Fraunhofer Stealthily Advances Compression Technologies |
By Jennifer White & Jeff Bier, 9/17/2008
 There’s a German research institution that many people outside of Europe have never heard of. Well, there are probably lots of German research institutions that many people have never heard of, but this particular one, Fraunhofer, was instrumental in developing a technology that millions of people use every day—a little thing called MP3. Fraunhofer also co-developed AAC and has been involved in developing the H.264 video codec, along with other codecs. But unlike the audio algorithm experts at Dolby, whose brand is visible on home audio equipment and whose name is nearly synonymous with high-quality audio, Fraunhofer has kept a relatively low profile. That’s because it has a somewhat unusual business model and history.
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| Case Study: Maximize Press Coverage of Your Product |
By Jennifer White & Jeff Bier, 9/17/2008
Unless you’re announcing a laptop that runs off body heat or similar epochal breakthrough, it’s hard for technology companies to get media attention. And when a product does get editorial coverage, it’s even harder to distinguish what’s true from the infomercials. With every announcement claiming “better,” “new,” and “breakthrough,” what will grab legitimate attention? One ingredient of a successful announcement, PR professionals agree, is compelling data.
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