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| BDTI Unveils High-Level Synthesis Tools Certification Program Results |
By BDTI, 1/20/2010
This week BDTI released the first results from its High-Level Synthesis Tools Certification Program (HLSTCP). The first tools to achieve certification are AutoESL’s AutoPilot and Synfora’s PICO. Additional certifications will be released on an ongoing basis, as agreements with tool vendors allow. The HLSTCP helps engineers and managers understand the capabilities of high-level synthesis (HLS) tools and assess when to consider these tools for their designs. HLS tool vendors can use the program to validate and improve the quality of results and productivity provided by their tools. (HLS tools are also referred to as electronic system level [ESL] synthesis, C synthesis, behavioral synthesis, or algorithmic synthesis tools.)
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| New ADI Blackfin Integrates Large Executable Flash for Control Applications |
By BDTI, 1/20/2010
Analog Devices, Inc. (ADI) has announced new members of the Blackfin processor family targeting control-loop applications. The new BF50x parts sport a much larger “executable” flash in place of the serial flash offered in earlier Blackfin chips, and integrate a 12-bit analog-to-digital converter suitable for control applications.
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| Jeff Bier’s Impulse Response—Small Processor Companies Have it Tough—But Not Impossible |
By Jeff Bier, 1/20/2010 It’s a tough world out there for small processor companies. It’s tough to attract new customers, and tough to support the ones you manage to get. A key challenge is the trend towards customers consolidating their purchasing: many system companies prefer to use fewer unique processors in their systems, for both business and technical reasons. From a business standpoint, using fewer different processors (and thus, using fewer vendors) can help streamline procurement and provide negotiating leverage with suppliers. And from a technical standpoint, using fewer different processors can simplify development and facilitate re-use of software and know-how.
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| Case Study: Technical Due Diligence |
By BDTI, 1/20/2010 Although the economy appears to be on the mend, established technology companies and venture capitalists alike remain cautious about their investments. When considering investments, acquisitions or major product purchase decisions, they are wary of accepting companies’ claims about their technology at face value and often turn to outside experts for technical due diligence evaluations to assess and manage risk.
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| MIPS Launches MicroMIPS Architecture with Two New Cores |
By BDTI, 12/16/2009
This month MIPS introduced two new cores, the M14K and M14Kc, that are based on a new instruction set architecture called microMIPS. MicroMIPS uses a mixed-width 16/32-bit instruction set to improve code density relative to the MIPS32 instruction set architecture. In general, processors with smaller program memory requirements require less on-chip and off-chip memory, and less memory bandwidth. This can translate into reduced cost and power consumption. Since cost and power are key metrics for many embedded applications, 16-bit compressed instruction sets have become fairly common.
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| CEVA Simplifies DSP Software Development |
By BDTI, 12/16/2009
This month CEVA announced significant improvements to its software tool suite. Collectively, the new tools and features are dubbed the CEVA Application Optimizer, and are part of the CEVA-Toolbox software development suite. CEVA describes these capabilities as providing an “end-to-end, fully C-based development flow.” This is an important topic for users of DSP processors, who are less and less willing to write heavily target-specific C code or assembly code which requires them to become architecture experts.
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| Jeff Bier's Impulse Response—NVIDIA GPUs Turn Up the Heat |
By Jeff Bier, 12/16/2009 In October of 2007, I wrote a column called “When Worlds Collide,” which was about NVIDIA’s emerging strategy of offering “general-purpose GPUs.” At the time, I thought it was interesting that NVIDIA had begun to move beyond graphics applications to target “high-performance computing” (HPC) applications like financial and seismic analysis, thus competing with processors outside of the GPU space. I also observed that the ubiquity of GPUs in PCs would likely help NVIDIA gain traction in non-GPU applications.
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| Case Study: Measuring Energy Consumption of Embedded Applications |
By BDTI, 12/16/2009 Energy consumption is a chief concern for most embedded applications, especially for portable applications where battery life is paramount. In these applications, an accurate understanding of energy consumption is critical to processor selection and to system design. Unfortunately, many obstacles hinder comparisons of processors’ energy consumption.
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| Multicore Heats up with Chip Announcements from TI, Tilera |
By BDTI, 11/18/2009
Recently both Texas Instruments and Tilera announced new multicore chips. TI announced the TMS320C6472, which includes six ‘C64x+ processor cores running at 500-700 MHz (depending on the family member). Tilera announced a new chip family, the TILE-Gx, which will include variants with 16-100 cores running at 1.25-1.5 GHz. The ‘C6472 is available now, while Tilera does not expect to start sampling TILE-Gx chips until late 2010. According to Tilera, TILE-Gx chips will be fabbed in a 40 nm process. These announcements represent two of the common approaches to multicore today: putting a handful of processors that were originally designed for standalone use on a single die (TI) and creating a new architecture incorporating numerous cores (Tilera).
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| Quartics Announces Flexible Video Chip |
By BDTI, 11/18/2009
This month fabless semiconductor start-up Quartics introduced the QV1721, a video coprocessor SoC targeting applications such as netbook PCs, set-top boxes and high-definition televisions. The QV1721 is intended to be used to offload demanding video tasks from the main CPU in a system. The chip provides high-definition video encoding, decoding, and transcoding functions, along with post-processing to improve perceived video quality.
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