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Articles from
October 2009
| Synphony Synthesis Tool Takes MATLAB to RTL |
By BDTI, 10/21/2009
 High-level synthesis tools (i.e., tools that take high-level language code and generate an RTL-based hardware implementation) have been around a long time, but historically they have had limited success in the market. The primary problems have been that they have been hard to use and have generated relatively inefficient implementations. But their potential advantages are compelling, particularly as applications become more complicated: in the best case they can reduce implementation time and errors, and possibly reduce the need for RTL experts. For these reasons, a number of vendors have introduced high-level synthesis tools in recent years, including AccelChip (later acquired by Xilinx), Mentor Graphics, Cadence, AutoESL, and Synfora, among others. Most of these take C representations as inputs and synthesize them into RTL for FPGA or ASIC implementation, though some have promised MATLAB to RTL.
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| Case Study: Chip Vendors, Walk a Mile in Your Customers’ Shoes |
By BDTI, 10/21/2009
Let’s face it: Applications are getting more complicated. Chips are getting more complicated. And engineering teams are generally getting smaller, not larger. As a result, it’s incumbent on chip vendors to provide robust, easy-to-use development kits. Design engineers rely on these kits to quickly evaluate chips and prototype key portions of their systems.
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| Jeff Bier's Impulse Response—Creative Tools Key to DSP on MCUs |
By Jeff Bier, 10/21/2009
The beauty of digital signal processing is that it enables people to convert available processing power into cool new features, better performance, and lower power in their products. There are countless examples, including MP3 players, wireless communications of all kinds, medical imaging, and voice recognition.
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