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Articles from
April 2007
| CEVA Unveils “Lite” Mobile Multimedia Platform |
By BDTI, 4/25/2007
In March CEVA unveiled “Mobile-Media-Lite” (MMLite), a family of multimedia solutions comprising licensable silicon IP and software. The family is aimed at low-end multimedia-enabled devices such as mobile TV players, portable multimedia players, and multimedia phones. CEVA also announced the first family member, the MM2200, a single-processor multimedia platform.
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| Xilinx Spartan gets DSP |
By BDTI, 4/25/2007
In recent years, FPGA vendors have been aggressively pursuing high-performance signal processing applications. This month Xilinx broadened its target DSP markets by announcing a new lower-cost DSP-oriented FPGA family, Spartan-3A DSP.
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| Jeff Bier’s Impulse Response – Efficiency Comes in Many Flavors |
By Jeff Bier, 4/25/2007 It’s generally accepted that, for processing engines, there is a trade-off between efficiency and generality. The more a chip is geared towards a specific application, the more efficient it's likely to be (in terms of speed, energy consumption, and cost).
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| Case Study: Multi-Tiered Software Optimization |
By BDTI, 4/25/2007 While nearly all signal processing applications require some degree of software optimization, some applications require a sophisticated, multi-tiered optimization approach in order to meet their performance goals.
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| Can ARM11 Handle DSP? |
By BDTI, 4/4/2007 Can ARM's latest core play the role of a DSP? Is it ready to take on video? BDTI's just-released benchmark results and analysis answer these questions.
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| Stealth Startup RemSilicon Announces Massively Parallel Architecture |
By BDTI, 4/1/2007
On March 18th fabless semiconductor startup RemSilicon revealed its new massively parallel reconfigurable processor. The company joins a host of startups pursing a similar idea: chaining together large arrays of simple processing elements using novel interconnection schemes.
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| Xilinx Unveils Two New Virtex-5 FPGAs |
By BDTI, 4/1/2007
This month Xilinx announced two new members of its Virtex-5 family of FPGAs. The devices will be implemented in a 65 nm process and share the same basic architecture as existing Virtex-5 devices. Unlike previous devices however, Xilinx has optimized the new Virtex-5 FPGAs for higher instead of lower power consumption.
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| Case Study: Software Turns Green |
By BDTI, 4/1/2007 Vendors of signal processing technology are well aware of the impact power consumption can have on the success of a product, particularly in mobile devices where battery life is critical. But in recent months vendors have seen increased pressure to deliver lower power from an unlikely source.
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| Jeff Bier’s Impulse Response – Faster signal processing: a double-edged sword? |
By Jeff Bier, 4/1/2007 Recent years have seen a proliferation of architectures for digital signal processing. Running the gamut from general-purpose processors and application-specific SoCs to the more-recent DSP-enhanced FPGAs and multi-core processors, these architectures promise unprecedented DSP performance. This has left me wondering: Is more speed always a good thing?
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