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Inside DSP on Tools: FPGA Tools Bridge Gap Between Algorithm and Implementation
By Amit Shoham, 6/15/2005

Increasingly FPGAs are being used to perform signal-processing tasks, particularly in computationally demanding application areas such as video processing and communications. Their massive parallelism often allows FPGAs to handle data rates much higher than what DSPs and general-purpose processors can manage, and in today’s world of rapidly evolving applications and standards FPGAs’ programmability is an advantage over hard-wired solutions. In recent years FPGA vendors have begun to include signal-processing-oriented features such as hard-wired multiplier units in their chips, making FPGAs an even more appealing solution for many DSP applications.

But implementing an algorithm on an FPGA requires much greater design effort compared to a DSP or general-purpose processor. Efficient FPGA implementations involve many subtle design choices and complex tradeoffs. In addition, the languages and tools traditionally used for FPGA design are unfamiliar to most DSP engineers. Fortunately, FPGA vendors and several tools vendors now provide high-level tools aimed at implementing signal processing algorithms on FPGAs while maintaining an intuitive representation of the algorithm. In this article we explore how these offerings help developers meet the challenges of using FPGAs in signal processing applications.

Describing DSP algorithms

Signal processing algorithms are often designed and specified using the The MathWorks’ MATLAB language or via a graphical block diagram language using tools such as The MathWorks’ Simulink. (See “Languages for Signal Processing Software Development” for more on this topic.)

But carefully optimized implementations of signal processing algorithms targeting FPGAs have historically taken the form of RTL code. This code bears little resemblance to the abstract, intuitive block diagram descriptions or MATLAB code.

FPGA vendors and independent tools vendors provide FPGA development tools that help bridge this gap between an intuitive algorithm description and an optimized implementation. Most of these tools rely on the popular Simulink and MATLAB languages to represent signal-processing algorithms and provide features to enable FPGA implementation from these high-level descriptions.

Like most block-diagram languages, Simulink allows users and third-party vendors to provide customized blocks that users can incorporate into algorithm designs. FPGA vendors and FPGA tool vendors typically provide libraries of Simulink blocks representing common signal processing functions such as filters, FFTs, and error correction encoders and decoders. When users develop their algorithms using only these special blocks, the FPGA tools can convert the design into an FPGA implementation. FPGA market leaders Xilinx and Altera both provide such Simulink libraries and associated tools. Xilinx’s offering is System Generator; Altera’s is DSP Builder.

Third-party tools such as Synplicity’s Synplify DSP follow the same trend, but provide technology independence: Synplify DSP can target any FPGA or ASIC from its Simulink block library, while tools from Xilinx and Altera are specific to these vendors’ chips. Rather than providing its own custom block libraries, FPGA vendor Lattice Semiconductor relies on Synplify DSP to support implementation on its FPGA devices from a Simulink-based design.

Graphical block diagram languages have their advantages, but some algorithm developers prefer to use the MATLAB language for its powerful matrix and vector manipulation capabilities. Tool vendor AccelChip provides tools for converting algorithm descriptions in MATLAB into synthesizable RTL code that can easily be implemented in an FPGA or ASIC. AccelChip also provides a link to Xilinx’s Simulink-based System Generator environment, allowing users to convert MATLAB code into a block that can be incorporated into a Simulink block diagram and synthesized with System Generator.

Other tool vendors prefer to use their own languages instead of relying on MATLAB or Simulink. For example, CoWare’s SPW employs its own graphical block diagram language. SPW is oriented toward system-level design, where different portions of the system—such as a channel equalizer or error correction coder—may be implemented using different technologies, such as FPGAs, DSPs, or ASICs.

Since tools based on MATLAB or graphical block diagram languages rely on libraries of common DSP blocks, typically they are only effective in applications that are built primarily from common DSP functions.

The C language is also commonly used to describe DSP algorithms, particularly in standards-based applications. For example, C reference code is available for video compression standards such as MPEG-4 and H.264. Tools from vendors such as Celoxica assist designers in converting C code to an optimized FPGA implementation.

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