Processor vendors supply power consumption data for their products, but numerous factors cause significant variation in processor power consumption from application to application and task to task. In addition, vendors sometimes take very different approaches to reporting power consumption. As a result, there are many questions you should ask before assuming that data sheet power figures are relevant for your application, or that processors can be meaningfully compared based on these figures.

In this article we introduce important concepts that will help you get beyond the data sheet and on the road to accurately projecting processor power consumption for your application.

Processor Power Consumption
Where battery life is important, energy consumption—rather than power consumption—may be the most significant consideration. However, in some circumstances it can be important to optimize for minimum power consumption as well as minimum energy consumption. For more on this topic, see "Power, Energy, and Battery Life."

In addition, low power consumption is often synonymous with low energy consumption, and we use these terms somewhat interchangeably.

A simplified model of processor power consumption considers only two components: dynamic power and static power. Dynamic power is related to switching activity (the changing of internal logic levels) and the associated charging of internal load capacitances, while static power is related to the leakage current of transistors in steady state (refer to "Designing Low-Power Signal Processing Systems" for further details on dynamic and static power consumption).

Roughly speaking, static power consumption is constant for a given processor: whenever the processor is powered on, every transistor in the processor contributes a small amount to the overall static power consumption. Dynamic power consumption, on the other hand, is highly variable; it depends on the operations being performed and on the data being processed. Processor operating modes can further complicate the picture, as different modes may effectively turn off portions of a processor, or force portions into a temporary steady state.

Today, dynamic power consumption is orders of magnitude higher than static power consumption. But this relationship is changing: leakage current is becoming a larger factor as CMOS fabrication geometries shrink. (See "Designing Low-Power Signal Processing Systems" for details on this trend).

Many processor-based systems, for example PCs, PDAs, and cellular phones, can take advantage of periods of inactivity to reduce power consumption by placing portions of the processor in steady state pending a "wake-up" event. Processor vendors design processors with multiple operating modes to facilitate power savings in this manner.

Typically, processors have at least two operating modes: an "active" mode, where full processing power is available, and an "idle" mode, where the portions of the processor are forced to steady state. Many processors have intermediate modes too, which provide intermediate levels of power consumption and processor functionality. Unfortunately, neither the terminology used to describe these modes nor the modes themselves are standardized across vendors. Hence you will probably have to refer to processor user manuals in order to compare processors' operating modes.

The relative importance of power consumption in each mode depends on the duty cycle of the system. For example, idle mode power consumption may dominate overall power consumption in a system that spends most of its time waiting for something to happen.