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| Stealth Startup RemSilicon Announces Massively Parallel Architecture |
By BDTI, 4/1/2007
On March 18th fabless semiconductor startup RemSilicon revealed its new massively parallel reconfigurable processor. The company joins a host of startups pursing a similar idea: chaining together large arrays of simple processing elements using novel interconnection schemes. In RemSilicon’s RemArray architecture, individual processing elements are not simple RISC-like processors like those found in many massively parallel architectures, but rather nodes in an adaptive network that models human brain function.
A key challenge faced by RemSilicon was creating a programming model capable of efficiently utilizing the RemArray architecture. “We started with traditional languages such as ANSI C, but soon realized we needed something radically different to unlock the RemArray’s true potential”, explains John Gibralter, chief technical officer of RemSilicon. Instead of a traditional “programming language”, the RemArray is programmed by EEG measurements of brain wave activity. Programmers are trained to meditate on the functionality of a chip until RemSilicon’s synthesis tool has implemented it on the RemArray.
“There’s a lot of talk these days about massively parallel processing. What processing architecture is more massively parallel than the human brain? We believe that even the brain of someone who’s not that smart will function better than our competition”, said Gibralter. “Companies spend a staggering amount of money on engineering resources for a typical chip design. With the RemArray, chips can be designed without any engineering knowledge during the course of a single meeting.”
RemSilicon reports that most of its initial customers program the RemArray at the CEO level. When asked what the biggest challenge CEO’s faced when programming the RemArray, Mr. Gibralter said, “With some of our initial CEO clients we ran into problems with unwanted functionality in the chips. A design would not be meeting its performance target and debugging would reveal elements of the RemArray dedicated to functions like stock option backdating or initiating unsavory relations with coworkers. That’s why we now have several mindfulness coaches on our technical staff to help CEOs stay focused.”
When asked about the mechanism for translating EEG to silicon, Mr. Gibralter said, “If I told you I’d have to kill you.” While RemSilicon’s novel programming model is still untested, the RemArray architecture may be appealing to companies with CEOs. RemSilicon’s first chip , the REM 5050 is currently sampling. The company reports that they’re meditating on full volume production and expect volume shipments yesterday.
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