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| AutoESL’s AutoPilot High-Level Synthesis Tool Achieves BDTI Certification |
By BDTI, 2/16/2010
 BDTI recently completed an in-depth analysis of AutoESL’s AutoPilot high-level synthesis tool via the BDTI High-Level Synthesis Tool Certification Program™. BDTI evaluated the process of implementing applications on a Xilinx FPGA using AutoPilot, comparing it with traditional FPGA design based on hand-written RTL code, and with DSP processor software development. Overall, AutoPilot demonstrated a strong ability to generate high-quality RTL code—with equivalent resource utilization to hand-written RTL code.
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| Texas Instruments Introduces New Multi-Core System-on-Chip Architecture |
By BDTI, 2/16/2010
 TI has unveiled a new chip-level architecture for high-performance, multi-core DSP-processor-based SoCs. Most notable among its features are new on-chip and chip-to-chip interconnection mechanisms, an upgraded high-performance DSP core, and both hardware and tools support for programming concurrent applications. The architecture is optimized to run at 1.0 to 1.2 GHz in 40 nm process technology.
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| BDTI Unveils High-Level Synthesis Tools Certification Program Results |
By BDTI, 1/20/2010
 This week BDTI released the first results from its High-Level Synthesis Tools Certification Program (HLSTCP). The first tools to achieve certification are AutoESL’s AutoPilot and Synfora’s PICO. Additional certifications will be released on an ongoing basis, as agreements with tool vendors allow. The HLSTCP helps engineers and managers understand the capabilities of high-level synthesis (HLS) tools and assess when to consider these tools for their designs. HLS tool vendors can use the program to validate and improve the quality of results and productivity provided by their tools. (HLS tools are also referred to as electronic system level [ESL] synthesis, C synthesis, behavioral synthesis, or algorithmic synthesis tools.)
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| CEVA Simplifies DSP Software Development |
By BDTI, 12/16/2009
 This month CEVA announced significant improvements to its software tool suite. Collectively, the new tools and features are dubbed the CEVA Application Optimizer, and are part of the CEVA-Toolbox software development suite. CEVA describes these capabilities as providing an “end-to-end, fully C-based development flow.” This is an important topic for users of DSP processors, who are less and less willing to write heavily target-specific C code or assembly code which requires them to become architecture experts.
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| Jeff Bier's Impulse Response—NVIDIA GPUs Turn Up the Heat |
By Jeff Bier, 12/16/2009
In October of 2007, I wrote a column called “When Worlds Collide,” which was about NVIDIA’s emerging strategy of offering “general-purpose GPUs.” At the time, I thought it was interesting that NVIDIA had begun to move beyond graphics applications to target “high-performance computing” (HPC) applications like financial and seismic analysis, thus competing with processors outside of the GPU space. I also observed that the ubiquity of GPUs in PCs would likely help NVIDIA gain traction in non-GPU applications.
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| Synphony Synthesis Tool Takes MATLAB to RTL |
By BDTI, 10/21/2009
 High-level synthesis tools (i.e., tools that take high-level language code and generate an RTL-based hardware implementation) have been around a long time, but historically they have had limited success in the market. The primary problems have been that they have been hard to use and have generated relatively inefficient implementations. But their potential advantages are compelling, particularly as applications become more complicated: in the best case they can reduce implementation time and errors, and possibly reduce the need for RTL experts. For these reasons, a number of vendors have introduced high-level synthesis tools in recent years, including AccelChip (later acquired by Xilinx), Mentor Graphics, Cadence, AutoESL, and Synfora, among others. Most of these take C representations as inputs and synthesize them into RTL for FPGA or ASIC implementation, though some have promised MATLAB to RTL.
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| Is Your Development Kit Ready for Customers? |
By BDTI, 5/20/2009
Time-to-market pressures mean that system designers, software developers and integrators require more than just hardware from their chip vendors. They demand reliable, easy-to-use software development tools, OS support, middleware and application software components, I/O support, and more—right out of the box. To win design-ins, a chip vendor must deliver much more than just processing performance on a board. Vendors are responding to this demand by packaging development boards, software development tools, and software components in a variety of increasingly sophisticated and diverse development kits.
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| Jeff Bier's Impulse Response—The Getting-the-Box Experience |
By Jeff Bier, 5/20/2009
Whenever I talk to chip and tool vendors about the ease-of-use of their products, they invariably brag about how much time they’ve invested in ensuring a good “out-of-the-box experience.” What they mean is that, when a customer first starts using one of their products (say, a development kit), the customer finds it easy to get the tool up and running. This is important, and it’s hard to do well. We here at BDTI often run into glitches in this area: things like missing files, documentation that’s out of sync with the software or hardware, bugs in the install program, etc. But, worthy topic though it is, the typical out-of-the-box experience is not the subject of today’s rant.
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| Improving Products and Product Announcements—Cost-Effectively |
By BDTI, 3/18/2009
We all know that test marketing is the best way to see if a product meets buyers’ needs. Household and consumer product manufacturers test their products with a select test market as a matter of course. They use test marketing as a rehearsal for product introduction and to avoid disasters. For technology developers and vendors, test marketing can be just as valuable, but finding the right test market can be tricky. After all, the right test market is the target market—and when this is the case, there’s little room for error.
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