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| AutoESL’s AutoPilot High-Level Synthesis Tool Achieves BDTI Certification |
By BDTI, 2/16/2010
 BDTI recently completed an in-depth analysis of AutoESL’s AutoPilot high-level synthesis tool via the BDTI High-Level Synthesis Tool Certification Program™. BDTI evaluated the process of implementing applications on a Xilinx FPGA using AutoPilot, comparing it with traditional FPGA design based on hand-written RTL code, and with DSP processor software development. Overall, AutoPilot demonstrated a strong ability to generate high-quality RTL code—with equivalent resource utilization to hand-written RTL code.
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| BDTI Unveils High-Level Synthesis Tools Certification Program Results |
By BDTI, 1/20/2010
 This week BDTI released the first results from its High-Level Synthesis Tools Certification Program (HLSTCP). The first tools to achieve certification are AutoESL’s AutoPilot and Synfora’s PICO. Additional certifications will be released on an ongoing basis, as agreements with tool vendors allow. The HLSTCP helps engineers and managers understand the capabilities of high-level synthesis (HLS) tools and assess when to consider these tools for their designs. HLS tool vendors can use the program to validate and improve the quality of results and productivity provided by their tools. (HLS tools are also referred to as electronic system level [ESL] synthesis, C synthesis, behavioral synthesis, or algorithmic synthesis tools.)
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| Case Study: Benchmarking PowerPoint Processors |
By BDTI, 8/26/2009
Processor designers know that a cycle-accurate simulator can be used to benchmark a processor that has not yet been fabricated. But many designers don’t realize that it’s also possible to benchmark an idea for a processor, a processor that may exist only in PowerPoint slides—and that there are good reasons for doing so.
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| BDTI Releases Benchmark Results for Toshiba's Venezia Platform |
By BDTI, 4/22/2009
 BDTI recently completed a benchmark analysis of the Toshiba MeP “Media embedded Processor” core and “IVC2” SIMD coprocessor, both of which are used in Toshiba’s Venezia mobile multimedia platform.
The MeP is a licensable core that is intended to be used as a building block in multi-core, multimedia-oriented SoCs, typically with multiple MeP cores on a chip. Each MeP core can be customized with specialized instructions, co-processors, and memory sizes.
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| BDTI Releases Benchmark Results for CEVA-Teaklite-III |
By BDTI, 2/18/2009
BDTI has released BDTI DSP Kernel Benchmarks™ results for the CEVA-TeakLite-III core from CEVA. As we’ve written previously, CEVA-TeakLite-III is a 32-bit DSP core that primarily targets audio applications (both portable and high-definition) but also targets VoIP and cellular baseband. It is the third generation of CEVA’s TeakLite architecture, and the first to use a native 32-bit data size. The CEVA-TeakLite-III also supports SIMD (single-instruction, multiple data) dual-16-bit MACs.
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| BDTI Releases Benchmark Results for CoreWorks DSP Engine |
By BDTI, 1/21/2009
BDTI has released BDTI DSP Kernel Benchmarks™ results for the SideWorks signal processing engine from CoreWorks, a Portugal-based vendor of licensable silicon intellectual property. SideWorks is a licensable DSP accelerator targeting cost and power-sensitive applications such as multimedia and communications. The core is both configurable (i.e., hardware resources included in a specific implementation are selected prior to fabrication) and reconfigurable (i.e., the movement of data and some aspects of execution unit functionality are programmable at run time). SideWorks is not designed to run as a stand-alone processor; it is intended to be coupled to a general-purpose “host” processor that manages program flow and data input/output. For this reason, BDTI’s benchmark results are implemented on a SideWorks core coupled to CoreWorks’ “FireWorks” CPU core.
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| BDTI Releases Benchmark Results for Sandbridge SB3500 |
By BDTI, 1/21/2009
 BDTI has released the first independent benchmark results comparing the performance of the Sandbridge “Sandblaster” SB3500 multi-core DSP chip to that of massively parallel chips, high-performance DSP processors, and FPGAs.
Sandbridge Technologies, Inc. is a fabless semiconductor company that sells multi-core chips targeting mobile 3G and 4G baseband and multimedia processing. The SB3500 chip includes three DSP cores along with an ARM core; each of the DSP cores supports four-way multithreading and 16-way SIMD operations. The SB3500 is implemented in a 65 nm process, and is available with the DSP cores running at either 500 or 600 MHz. The 500 MHz chip costs $25 in 1K quantities; pricing for the 600 MHz chip has not yet been disclosed.
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| Custom Benchmarks Lead to Successful Products |
By BDTI, 12/17/2008
Processor and SoC vendors are always looking for the next “killer app.” To enter a new market, though, vendors face two key challenges. First, they must ensure that their product is competitive; and second, they must convince prospective customers of their product’s advantages. These challenges are tough to overcome in new markets due to a lack of well-understood application requirements and established benchmarks. In addition, it is often difficult to obtain reliable information about competing products.
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| Jeff Bier's Impulse Response — Don’t Ban Benchmarks |
By Jeff Bier, 12/17/2008
I recently read a license agreement for a suite of software development tools and discovered some interesting fine print: the agreement prohibits licensees from benchmarking the tools. Well, it doesn’t prohibit benchmarking per se, but it prohibits disclosure of any results.
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| Case Study - Improving Chip Architectures with Specialized Talent |
By BDTI, 10/15/2008
In an ideal world, chip designers would evaluate their new designs on real applications. But who’s got the time to implement an entire cellular baseband or video codec just to see if their proposed design is efficient? That’s the reason chip designers use benchmarks. But benchmarking is not just about selecting the right algorithms. It’s also about careful implementation—careful crafting of software that is appropriately optimized for the target architecture. As a result, sound benchmarking is a time-consuming activity. That’s why many chip companies come to BDTI; not only for BDTI’s benchmarks, but often to have their own—or their customers’—benchmarks implemented by BDTI’s expert engineering staff.
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